- Register File/ Digital Datapath Design Engineer
Qualification: Masters degree in Electrical or Computer Engineering.
Experience: At least 3 or more years of experience in related field.
- Sr. Data Engineer
Qualification: BE/ B.Tech. or equivalent.
Experience: 8-12 years experience with at least 3 years in information management and big data architecture.
- Engineer- LTE PHY (Firmware)
Qualification: Bachelors/ Masters degree or a PhD in related areas from a Tier1 Institute.
Experience: 3 to 7 years.
- Pre Si Validation Engineer
Qualification: BE/ B.Tech./ ME/ M.Tech.
Experience: 6-8 years of relevant industry experience.
- FW Validation Engineer
Qualification: Bachelor of Science degree in Engineering or a Master of Science degree in Computer Science or Electronics Engineering or equivalent.
For more details, please visit: intel.taleo.net/careersection/10000/jobsearch.ftl